X6-GSPS

Two 1.8 GSPS, 12-bit A/Ds, Xilinx Virtex-6 FPGA, and 4 GB LPDDR2

Overview

The X6-GSPS XMC card integrates high-speed digitizing with signal processing on a PCI Express XMC IO module for demanding DSP applications. The tight coupling between the digitizing and the Virtex6 FPGA core is well suited for SDR, RADAR, and LIDAR front end sensor digitizing and processing. The PCI Express system interface sustains transfer rates over 2 GB/s for datarecording and integration as part of a high-performance, real-time system.

Key Features

AMD Virtex 6

2 A/D channels
12-bit, 1.8 GSPS

4 GB LPDDR2

Block Diagram, Data Sheet and Product Details

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Features

  • Two 1.8 GSPS, 12-bit A/D channels/single
    channel interleaved at 3.6 GHz
  • Input Bandwidth: 2.2 GHz
  • 1 Vp-p, AC-coupled, 50 ohm, SMA inputs
  • Xilinx Virtex-6 SX475T/SX315T/LX240T
  • Xilinx Artix-7 FPGA
  • 4 banks of 1 GB DRAM (4 GB total)
  • Ultra-low jitter programmable clock
  • Gen2 x8 PCI Express providing 3.2 GB/s
    sustained transfer rates (-2 FPGA Required)
  • Digital IO: 32-bits LVDS/64-bit LVCMOS
  • Pulse repetition interval trigger mode
  • XMC Module (75×150 mm)
  • 26 W typical
  • Conduction cooling per VITA 20
  • Ruggedization Levels for wide temperature
    and Vibration/Shock
  • Adapters for VPX, Compact PCI, desktop PCI
    and cabled PCI Express systems

Applications

  • Wireless Receiver
  • WLAN, WCDMA, WiMAX front end
  • RADAR
  • Medical Imaging
  • High Speed Data Recording and Playback
  • IP development

The X6-GSPS XMC card features two, 12-bit 1.8 GSPS A/Ds that can be interleaved to use as one 3.6 GSPS digitizer. Analog input bandwidth of over 2 GHz supports wideband applications and undersampling. The sample clock is from either a low-jitter PLL or external input. Multiple cards can be synchronized for sampling and down-conversion.

A Xilinx Virtex6 SX315T (LX240T and SX475T options) with 4 banks of 1GB DRAM provide a very high-performance DSP core with over 2000 MACs (SX315T). The close integration of the analog IO, memory and host interface with the FPGA enables real-time signal processing at extremely high rates.

The X6-GSPS power consumption is 25W for typical operation. The module may be conduction cooled using VITA20 standard and a heat spreading plate. Ruggedization levels for wide-temperature operation from – 85C operation and 0.1 g2/Hz vibration. Conformal coating is available.

The FPGA logic can be fully customized using VHDL and MATLAB using the FrameWork Logic tool set. The MATLAB BSP supports real-time hardware-in-
the-loop development using the graphical block diagram Simulink environment with Xilinx System Generator. IP cores for many wireless, DSP
and RADAR functions such as large-scale preintegrator, DDC, PSK/FSK demod, OFDM receiver, correlators and large FFT are available.

Software tools for host development include C++ libraries and drivers for Windows, Linux and VxWorks. Application examples demonstrating the module features are provided.

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