The SFP ports are compatible with SFF-xxxx transceivers, supporting both copper and fiber optic links. The four ports are fully independent on the module. SFP monitoring and control signals are mapped to the FMC interface for detection, loss-of-signal, rate control and I2C control port.
A flexible reference clock for on the FMC-SFP is fully programmable over the0.16 to 350 MHz range. The clock can be programmed for all common rates for standards such as OC-12, OBSAI, CPRI, GbE, sFPDP and SONET. The clock has jitter performance of less than 1 ps RMS max, allowing it to meet the most stringent requirements for these applications. An on-card 10MHz with 0.5 PPM stability is used as the PLL reference.
The FMC-SFP is fully electrically compatible with FMC (ANSI/VITA 57) specifications for IO module. Mechanically, the module will fit FMC sites, but protrudes from the face plate for the SFPs. The module is compatible with FMC HPC sites (4 SFP ports) or LPC (1 SFP port). The module consumes
500 mW exclusive of SFP modules.
The FMC is provided with VHDL code illustrating the interfaces. Specific FPGA and platform support is provided for Innovative’s VPXCOP and PEX-COP FPGA cards. Software libraries and examples for C host development are provided. Application examples demonstrating the module features are provided for Innovative Integration platforms in for Windows, Linux and