The FMC-500M is a high speed digitizing and signal generation FMC IO module featuring two 500 MSPS A/D channels and two 1200 MSPS D/A channels supported by sample clock and triggering features.
The HRG gives you much more detail about the card such as block diagrams, tables and descriptions.
The FMC-500M features a dual channel, 14-bit 500MSPS A/D device plus a dual 1200 MSPS update rate DAC device. Analog IO may be either AC or DC coupled. Receiver IF frequencies of up to 500 MHz are supported due to the wide bandwidth analog front-end. The sample clock may be sourced from either a low-jitter PLL or external input. Multiple cards can be synchronized for sampling to address MIMO applications.
The FMC-500M power consumption is 12 W for typical operation. The module may be conduction cooled using VITA20 standard and a heat spreading plate. Ruggedization levels for wide-temperature operation from -40 to 85C operation and 0.1 g2/Hz vibration. Conformal coating is available.
Support logic in VHDL is provided for integration with FPGA carrier cards. Specific support for Innovative carrier cards includes integration with Framework Logic tools that support VHDL and Matlab developers. The Matlab BSP supports real-time hardware-in-the-loop development using the graphical block diagram Simulink environment with Xilinx System Generator for the FMC integrated with the FPGA carrier card.
Software tools for Innovative carrier cards include host development C libraries and drivers for Windows and Linux, 32/64-bit including RTOS variants. Application examples demonstrating the module features are provided.
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